一个应用混合基算法的余数系统后置转换电路设计

A Circuit Design of Residue to Binary Converter Using the Mixed Radix Algorithm

针对传统的混合基算法在实现余数系统到二进制系统转换过程中的并行性问题,应用改进的混合基算法,研究与设计了一个基于模集合{2n,2n-1,2n+1-1,2n-1-1}的后置转换电路.模2n-1形式的模加法器采用相对简单的实现结构,使设计的电路避免了只读存储器及时序电路的引入,整个后置转换电路完全由简单组合逻辑及加法器级联实现,缩短了关键路径延时,减小了功率消耗,与已有的相同动态范围余数系统后置转换电路相比,性能优势明显.

The conversion of residue number system to binary system using traditional mixed radix conversion lacks of parallelism. An improved mixed radix conversion is proposed. A residue to binary（R/B） conversion circuits based on moduli {2n,2n-1,2n＋1-1,2n-1-1} is studied and designed. The modulo 2n - 1 adder has a relatively simple implementation, in which the design of the circuit is to avoid the introduction of read-only memory and time sequence circuit, and the R/B conversion circuit is implemented by a simple combination of logic and adder cas- cade. The analysis results show that the reverse converter shortens the delay of critical path and decreases the power dissipation efficiently. Compared to those R/B converters with same dynamic range designed in recent years, the circuit designed in this paper has a better performance advantage apparently.