基于FPGA的出租车计费器系统的设计

The Design of the Cab Fare Register System Based on FPGA

本文设计的出租车计费器系统是用FPGA来实现的,利用VHDL完成计费器系统各主要模块的设计,并在MAX+plus II开发环境下进行编译,仿真,然后下载到FPGA芯片中进行系统可行性的测试。该系统可靠性高、成本低、通用性强。

This article designs a taxi fare register system. It is implemented with FPGA, uses VHDL to complete system design of tile main modules, and the MAX ＋ plus Ⅱ development environment to compile, simulation, and then downloaded to the FPGA chip system feasibility test.The system has high reliability, low cost, strong commonality.