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一种自偏置微电流源的拆环仿真验证技术

A Loop Simulation Technology of Self-Biased Micro Current Source
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摘要 由于IC芯片设计普遍采用全局偏置技术,而偏置电路的稳定性对电路的性能有较大影响。结合集成电路对高精度基准电流源的需求,设计了一种具有自偏置功能的恒定输出电流源电路,输出电流值为5μA。同时该电路对温度变化敏感度极低,温度-40°-125°变化时输出电流仅变化不到0.8%。为了避免电路设计不当带来环路自激振荡的危险,本模块设计中增加了环路稳定性的验证,采用Cadence Spectre进行模拟仿真,仿真结果表明该电路在保持高电源抑制比的同时,提高了输出电流的稳定性与可靠性。 Due to the wide use of overall bias technology in IC design, the stability of bias circuit is of great influence on the performance of the whole circuit. In combination of the requirement of high-precision current source for integrated circuit, a constant output of current source circuit with self-biased function is implemented, and the output current value is 5uA. Meanwhile, this circuit is extremely insensitive to temperature variation, and the change of output current is less than 0.8% while the temperature varies from -40° to 125°. In order to avoid loop self-oscillation caused by improper circuit design, the verification of loop stability is added in this module design. This design is simulated with Cadence Spectre, and the result indicates that the circuit could maintain high PSRR (Power Supply Rejection Ratio) and improve the stability and reliability of current output.
出处 《通信技术》 2015年第10期1202-1206,共5页 Communications Technology
关键词 基准电流源 自偏置 环路验证 电源抑制比 reference current self-biased loop verification PSRR
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  • 1朱樟明,杨银堂,尹韬.一种新型低压高精度CMOS电流源[J].西安电子科技大学学报,2005,32(2):174-178. 被引量:7
  • 2张耀忠,吴建辉,丁家平,龙善丽.一种改进的内置和式基准电流源的设计[J].应用科学学报,2006,24(1):50-54. 被引量:3
  • 3彭小峰,雷李,张里.跳频接收机中调谐高放电路的设计[J].信息安全与通信保密,2007,29(1):93-95. 被引量:6
  • 4Birx D. Induction linear accelerators[M]. New York:American Institute of Physics Press, 1992.
  • 5Sansen W M.Analog Design Essentials[M].The Netherlands:Springer,2006.
  • 6Banba H,Shiga H,Umezawa A,et al.A CMOS bandgap reference circuit with sub-1-V operation[J].IEEE JSSC,1999,34 (5):670-674.
  • 7Mok K N L,Mok P K T.A sub-1-V 15-ppm/C CMOS bandgap voltage reference without requiring low threshold voltage device[J].IEEE JSSC,2002,37(4):526-530.
  • 8Lin Y T,Chung W Y.A low voltage CMOS bandgap reference[C].IEEE ISCAS Kobe,Japan,2005:489-493.
  • 9Boni A.OP-amps and startup circuits for CMOS bandgap reference with near 1-V supply[J].IEEE JSSC,2002,37(10):890-894.
  • 10Luo Fangjie,Deng Honghui,Gao Minglun.A design of CMOS bandgap reference with low thermal drift and low offset[C].IEEE APCCAS,2008,30(12):538-541.

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