CMOS集成2D垂直型霍尔传感器电路设计

Design of CMOS integrated 2D vertical Hall sensor circuit

高失调电压和低磁场灵敏度严重影响了CMOS集成2D垂直型霍尔传感器的应用。提出了一种新颖的2D垂直型霍尔传感器失调消除和信号放大电路。采用2相旋转电流调制和相关双采样解调技术实现了对霍尔失调有效消除;采用信号复用技术实现了对X轴和Y轴输入的2D霍尔信号进行相同处理,避免了2轴霍尔信号之间的放大误差,大大降低了电路的功耗。基于CSMC 0.8μm高压CMOS工艺进行了电路设计,仿真结果表明该电路能最大消除40 m V霍尔失调电压,并对最小0.4 m V的2轴霍尔信号放大并线性输出霍尔电压。输出霍尔电压的线性度大于99.9%,电路静态功耗小于20 m W。

The large offset voltage grated 2D vertical Hall sensor. A and low magnetic sensitivity novel offset cancellation and sor is proposed in this paper. It applies both 2-phases spinning are seriously limited the applications of CMOS inte- signal amplification circuit for 2D vertical Hall sen- current modulation technique and correlated double sampling demodulation technique to effectively eliminate Hall offset. In addition, it uses signal multiplexing tech- nique to dispose the input 2D Hall signals on X and Y axis with the same magnification, which avoids the amplifi- cation errors between 2-axis Hall signals and greatly reduces power consumption. The circuit is designed based on CSMC 0.8 i^m high voltage CMOS process. The simulations show that the circuit can realize the amplification for 2- axis weak Hall signals and linearly output the Hall voltages proportional to the magnetic field intensity. The mini- mum allowable input Hall signal is 0.4 mV and the maximum Hall offset voltage is up to 40 mV. The linearity of output Hall voltage is greater than 99.9% and the static power consumption is less than 20 mW.