基于CPLD的正交编码信号采集和处理

Collection and Processing for Orthogonal Coded Signal Based on CPLD

介绍一种采用复杂可编程逻辑器件(CPLD)对正交编码信号采集和处理的设计。为提高光电增量编码器的解码精度,以CPLD为控制核心,设计信号采集、信号处理和硬件驱动3个模块。采用VHDL硬件描述语言设计信号处理模块,将其划分为滤波器、鉴相倍频器、计数器,并进行仿真和实验验证。结果表明该设计运行稳定、反馈精度高、可靠性强,分辨率可达0.09。。

A design to collect and process orthogonal coded signal by using complex programmable logic device （CPLD） is described. In order to enhance the decoding accuracy of photoelectric incremental encoder, CPLD is used as the control core, and three modules including signal collection, signal processing and hardware drivers are designed. The module of signal processing based on VHSIC hardware description language（VHDL） is divided into filter, phase frequency multiplier and counter, and tested by simulation and experiments. The results show that the design works steady, and has high precision of feedback and reliability, and the resolution can reach 0.09°.