摘要
Phase change memory （PCM） is a promising can- didate to replace DRAM as main memory, thanks to its bet- ter scalability and lower static power than DRAM. However, PCM also presents a few drawbacks, such as long write la- tency and high write power. Moreover, the write commands parallelism of PCM is restricted by instantaneous power con- straints, which degrades write bandwidth and overall perfor- mance. The write power of PCM is asymmetric： writing a zero consumes more power than writing a one. In this paper, we propose a new scheduling policy, write power asymme- try scheduling （WPAS）, that exploits the asymmetry of write power. WPAS improves write commands parallelism of PCM memory without violating power constraint. The evaluation results show that WPAS can improve performance by up to 35.5%, and 18.5% on average. The effective read latency can be reduced by up to 33.0%, and 17.1% on average.
Phase change memory （PCM） is a promising can- didate to replace DRAM as main memory, thanks to its bet- ter scalability and lower static power than DRAM. However, PCM also presents a few drawbacks, such as long write la- tency and high write power. Moreover, the write commands parallelism of PCM is restricted by instantaneous power con- straints, which degrades write bandwidth and overall perfor- mance. The write power of PCM is asymmetric： writing a zero consumes more power than writing a one. In this paper, we propose a new scheduling policy, write power asymme- try scheduling （WPAS）, that exploits the asymmetry of write power. WPAS improves write commands parallelism of PCM memory without violating power constraint. The evaluation results show that WPAS can improve performance by up to 35.5%, and 18.5% on average. The effective read latency can be reduced by up to 33.0%, and 17.1% on average.
