摘要
通过将数据与时钟的转变沿进行对比,检验其是否同步,设计了一种改进的基于时钟沿的单粒子翻转自检纠错电路结构,来实现数据翻转错误的检测和纠正。该电路在保持原有电路优点的同时,克服了原电路的不足,既可完成上升沿和下跳沿错误检测,又可以同时实现多位SEU错误的检测纠正。仿真和实际应用均表明,所提出的改进电路是一个有实用价值的检错纠错电路。
Based on the clock edge, an upset (SEU) is proposed in this paper. determining whether the data and clock comings of the EDAC circuit and it can chieve multi-bit SEU error detection and the proposed improved EDAC circuit is improved error detection and correction (EDAC) circuit for single event The circuit can implement the data error detection and correction through are asynchronous or not. It keeps the advantages and overcomes the short- not only complete detection under clock rising or falling correction. The simulation results and their analysis show indeed better. edge but also a- preliminarily that the proposed improved EDAC circuit is indeed better.
出处
《西北工业大学学报》
EI
CAS
CSCD
北大核心
2015年第5期716-720,共5页
Journal of Northwestern Polytechnical University
基金
国家自然科学基金(61371024)
航空科学基金(2013ZD53051)
航天支撑技术基金及中航产学研项目(Cxy2013XGD14)资助
关键词
超大规模集成电路
单粒子翻转
时钟沿
自检纠错
Asynchronous sequential logic
Clocks
Errors
Radiation hardening
Reconfigurable hardware