摘要
针对当前DTI技术中采用的闭环相位调整位同步方法,存在同步建立时间较长的缺点,提出一种新的开环位同步方法。该方法在位同步失步的情况下,不会产生同步建立时间和调整精度相互制约的问题。借助FPGA开发平台,给出了新的开环位同步方法的设计过程,并在ISE10.1平台上进行了实现。使用软件对新的位同步方法的性能进行了测试,结果证明开环位同步方法能够准确提取输入的同步时钟,实现位同步。
Considering the fact that it takes a long time for synchronization building in the bit synchronization method of closed-loop phase adjustment, a new open-loop bit synchronization method is proposed. In the case of bit synchronization failure, the problem of mutual restraint between the building time of synchronization and adjustment accuracy will not appear. The design process of the new open-loop bit synchronization method is provided based on FPGA, and is implemented on ISE10.1 platform. The performance of the method is tested by software, and the results show input synchronization clock can be extracted accurately with this method, and bit synchronization can be implemented.
出处
《黄山学院学报》
2015年第5期18-20,共3页
Journal of Huangshan University
基金
安徽省大学生创新创业训练计划项目(AH201310375056)
黄山学院自然科学研究项目(2013xkj009)