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一种改进型的高性能PSM调制升压芯片设计

A Design of Improved High-performance PSM Modulation Boost IC
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摘要 基于CSMC 0.5 um CMOS工艺设计了一种PSM(Pulse Skip Mode)调制电荷泵DC-DC升压芯片。优化整体结构使能控制最大程度上降低静态功耗,设计能够防止振荡器误操作的时钟逻辑控制电路、宽工作范围低温度系数的带隙基准和衬底最高电位选择电路,分别起到有效抑制纹波紊乱,减小开关切换时流过开关管的脉冲电流、拓宽芯片的工作温度范围和防止闩锁效应,减小芯片面积的作用。仿真结果表明所设计的改进措施使该芯片较传统的2倍升压电荷泵具有更低的稳定纹波、静态功耗和更宽的工作温度范围,进一步提高了升压电荷泵芯片的性能。 A design of PSM (Pulse Skip Mode) boost DC-DC IC base on CSMC 0.5 μm CMOS technology was presented. The circuit's overall structure was optimized to greatly reduce the static power. In the study, a clock logic control circuit which can prevent oscillator from accidental gesturing, a wide range low temperature coefficient band gap reference and a substrate maximum potential selector circuit were separately designed to effectively restrain ripple derangement, decrease the pulse current flow through the switching transistor, broaden the IC's temperature range, avoid latch up phenomenon and de- crease the chip area. As simulation results indicated, the proposed improvement measures enabled this IC's lower steady ripple, lower static power and wider working temperature range compared with traditional voltage doubling charge pumps, thus further improving the performance of boost charge pump chips.
作者 张子方
出处 《天津科技》 2015年第11期23-26,28,共5页 Tianjin Science & Technology
关键词 PSM调制 逻辑控制 尖峰脉冲 静态电流 衬底电位 PSM modulation logic control pulse peaking static current substrate potential
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参考文献10

  • 1Gendensuren M, Park J W, Lee C S, et al. Low power integrated 0. 35 pm CMOS voltage-mode DC-DC boost converter [C]//2013 Fourth International Conference on Power Engineering, Energy and Electrical Drives, Istanbul Turkey, 2013 : 502-505.
  • 2Wong O Y, Tam W S, Kok C W, et al. A novel gate boosting circuit for 2-phase high voltage CMOS charge pump [C]//IEEE International Conference of Electron Devices and Solid-State Circuits, 2009: 250-253.
  • 3Luo P, Luo L Y, Li Z J, et al. Skip cycle modulation in switching DC-DC converter [C]//IEEE 2002 Intema- tional Conference on Communications, Circuits and Systems and West Sino Expositions, 2002: 1716-1719.
  • 4熊富贵,罗萍,李肇基,刘建,郑尧.PSM调制电荷泵电路[J].微电子学,2004,34(2):125-127. 被引量:5
  • 5施敏,王强,张士兵,徐晨.基于0.5μm CMOS工艺的PFM调制DC-DC升压电路设计[J].微电子学与计算机,2010,27(5):27-30. 被引量:1
  • 6张彦科,鲍嘉明.一种基于升压DC-DC变换器的白光LED驱动芯片[J].微电子学,2011,41(4):525-527. 被引量:10
  • 7付军辉,秦忠洋.一种高转换速率衬底电位选择电路的设计[J].中国集成电路,2008,17(12):40-43. 被引量:2
  • 8AllenPE,HolbergDR.CMOS模拟集成电路设计[M].冯军,李智群,译.2版.北京:电子工业出版社,2012:359-386.
  • 9毕查德·拉扎维.模拟CMOS集成电路设计[M].陈贵灿,程军,张瑞智,等,译.西安:西安交通大学出版社,2002:309-327.
  • 10小林芳直.数字逻辑电路的ASIC设计[M].蒋民,译.北京:科学出版社,2004:33-51.

二级参考文献18

  • 1平立.白光LED驱动综述[J].现代显示,2006(6):44-48. 被引量:17
  • 2张赛,李冬梅.一种高效率白光LED驱动器的设计[J].微电子学,2007,37(3):428-431. 被引量:13
  • 3Phillip E Allen,Douglas R Holberg.冯军,李智群,译.CMOS模拟集成电路设计[M].北京:电子工业出版社,2005:379-386.
  • 4[1]Yuan Bing,Lai Xinquan.The Design of A Start-up Circuit for Boost DC-DC Converter with Low Supply Voltage[C].IEEE 6th Intemational Conference,2005:483-487.
  • 5[2]Ye Xiaobin,Chen Zhiliang.Low Voltage Serf-biasing Reference Circuits[C].IEEE 4th International Conference,2001:314-317.
  • 6[3]Airong Liu,Huazhong Yang.Low Voltage Low Power Class-AB OTA with Negative Resistance Load[C].IEEE 2006 International Conference Circuits and Systems,2006:2251-2254.
  • 7[4]Guo Xiaofeng,Lai Xinquan,Li Yushan,Wang Jianping.Design and Application of the Novel Low-Threshold Comparator Using Hysteresis[C].IEEE 6th International Conference,2005:549-553.
  • 8Letzng N K, Mok P K T. A Sub- 1 - V 15ppm CMOS bandgap voltage reference without requiring low threshold voltage device [J]. IEEE Journal of Solid - state Circuits, 2002,37(4) : 526- 530.
  • 9Annema A J. Low- power bandgap reference featuring DTMOST's[J]. IEEE Journal of Solid 2 state Circuits, 1999,34(7) : 949 - 955.
  • 10Banba H, Shiga Hi, Mmezawa A, et al. A CMOS bandgap reference circuit with Sub- 1V operation[J ]. IEEE Journal of Solid State Circuits, 1999(34): 670- 674.

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