基于0.18μm BiCMOS工艺的25Gbit/s光接收机前端电路设计

Front-End Circuit Design of 25 Gbit/s Optical Receiver Based on 0.18 μm BiCMOS Process

采用0.18μm SiGe BiCMOS工艺,设计并实现了一款传输速率为25 Gbit/s的高速光接收机前端电路。前端电路主要包括跨阻放大器(TIA)、限幅放大器(LA)、直流偏移消除电路和输出缓冲级4部分。跨阻放大器采用了伪差分结构,相比于传统的单端转差分电路,减少了共模噪声,增强了电路的稳定性。限幅放大器采用了Cherry-Hooper结构,利用射极跟随器作为反馈通路,降低了输出电阻,将输出电容与放大级隔离,从而拓展带宽,提高电路增益。直流偏移消除电路,有效消除了跨阻放大器输出端的直流偏移,提高了电路的稳定性。仿真结果表明,光接收机前端电路跨阻增益为65.4 dBΩ,带宽为25.3 GHz,灵敏度为-16.7 dBm,功耗为163 mW。

A high-speed optical receiver front-end circuit with a transmission rate of 25 Gbit/s was designed and implemented by using 0.18 μm SiGe BiCMOS process. The front-end circuit mainly inclu-ded four parts, such as the transimpedance amplifier(TIA), limiting amplifier(LA), DC offset cancellation circuit and output buffer stage. The pseudo-differential structure was adopted in transimpedance amplifier. Compared with the traditional single-ended to differential circuits, common-mode noise was reduced and circuit stability was enhanced. The limiting amplifier employed the Cherry-Hooper structure, which used the emitter follower as a feedback path to reduce the output resistance and isolate the output capacitor from the amplifier stage, thereby expanding the bandwidth and increasing the gain of the circuit. The DC offset cancellation circuit effectively eliminated the DC offset at the output of TIA, and increased the stability of the circuit. The simulation results show that the transimpedance gain of the optical receiver front-end circuit is 65.4 dBΩ, the bandwidth is 25.3 GHz, the sensitivity is-16.7 dBm and the power consumption is 163 mW.