星载ASIC芯片单粒子效应检测及在轨翻转率预估

Single Event Effect Detection and On-Orbit Upset Rate Estimation for Spaceborne ASIC Chip

为获得某星载专用集成电路(ASIC)控制运算芯片在轨单粒子翻转率,开展了不同线性能量传递(LET)值重离子辐照试验,并根据试验结果量化评估了该芯片抗单粒子翻转效应性能并获得了单粒子翻转截面。试验结果表明不带检错纠错(EDAC)功能的ASIC芯片静态随机存取存储器(SRAM)区单粒子翻转阈值低于1.7 MeV·cm2·mg-1,并随着重离子LET值增加,单粒子翻转位数迅速上升;带EDAC功能的ASIC芯片的单粒子翻转阈值为3.7 MeV·cm2·mg-1。根据试验获得的单粒子翻转截面,参考卫星飞行任务轨道参数和空间辐射环境计算得到了芯片在轨翻转率,无EDAC功能器件的在轨翻转率为1.29×10-6 bit-1·d-1,有EDAC功能器件为1.19×10-6 bit-1·d-1。分析结果表明经过辐射加固后,具有EDAC功能的ASIC控制运算芯片抗单粒子效应性能可以满足卫星在轨运行要求。

In order to obtain the on-orbit single event upset rate of the application specific integrated circuit(ASIC)control computing chip used on satellite,heavy ion irradiation experiments with different linear energy transfer(LET)values were carried out.Based on the experimental results,anti-single event upset effect of the ASIC chip was quantitatively evaluated and the single event upset section was obtained.Experimental results show that the single event upset threshold of the ASIC chip SRAM region without error detection and correction(EDAC)function is lower than 1.7 MeV·cm2·mg-1,and the single event upset number increases rapidly with the increase of the heavy ion LET value.The single event upset threshold of the ASIC chip with EDAC function is 3.7 MeV·cm2·mg-1.According to single event upset cross section obtained from the experiment,on-orbit upset rate of the ASIC chip was calculated by referring to satellite mission orbit parameters and space radiation environment.The on-orbit upset rate of the ASIC chip without EDAC function is 1.29×10-6 bit-1·d-1,and that of with EDAC function is 1.19×10-6 bit-1·d-1.Analysis results show that after radiation hardening,the ASIC control computing chip with EDAC function can meet requirements of satellite on-orbit operation.