摘要
基于JESD-51规范,采用有限元数值模拟方法,对薄型引脚式表面贴装QFP封装元件的详细模型进行数值模拟,得到其热阻值(θja、θjc),并且详细介绍各种散热途径对热阻结果的影响,以及不同环境温度下封装体可以达到的最大工作功率。结论表明,要改善IC本身的散热以及降低封装的热阻值,必须针对不同的封装形式来设计最符合成本及功能的散热方式,从封装材料、结构和工艺等方面进行改善。
In this paper, based on JESD-51 standard, the thermal resistance data （θja、θjc） of a detailed low-profile QFP model were analyzed by the thermal numerical simulation method, involved with different influencing factors of package＇s thermal properties and IC＇s maximum power in the different ambient temperature. The results show that if we want to improve the packages＇ heat dissipation ability and decrease their thermal resistance, we should take account of specific packages＇ outline and their materials, structure and assemble process.
出处
《电子工业专用设备》
2015年第11期16-20,49,共6页
Equipment for Electronic Products Manufacturing
关键词
电子封装
数值模拟
热阻
封装设计
Electronic package
Numerical simulation
Thermal resistance
Package design
