摘要
目前很多高实时性、高数据吞吐率、高灵活性的信号处理平台选择以vxworks为操作系统,PPC与FPGA之间以高速Rapid Io为互连的组织架构。很多时候,驱动设计者用对寄存器、内存直接访问的方式进行驱动的设计和开发,这种驱动设计方法管理混乱,不适宜驱动的模块化设计,不利于FPGA设备的抽象。针对这些问题,本文基于VxWorks的vx Bus驱动开发模型,提出了一种PPC与FPGA间以高速Rapid Io为互连的驱动设计方法 ,实现了FPGA设备的高抽象,大大有利于应用开发者对FPGA设备的透明调用,实现了驱动的模块化设计。通过在以Mpc8641D为主处理器,V7 FPGA为预处理芯片的信号处理板上试验证明了该方法的可行性和有效性。
Many signal processing platforms of highly real-time ,high data throughput and high flexibility select the organiza- tional structure which uses vxworks as the operating system and high-speed RapidIo as the connection of PPC and FPGA. A lot of times, driver designers develop programs in the way of accessing registers and memory directly. This method of driver design has chaotic management, disagrees with the modular programming of drivers, goes against the abstraction of FPGA devices. To solve these problems, based on the driver developing model of vxBus in vxworks, this paper proposes a driver design which is used in the condition of high-speed RapidIo as the connection of PPC and FPGA, which achieves the aim of high abstractness of FPGA devices. It is conductive for the application developer to call FPGA devices transparently, and realizes the modular programming of drivers. A series of experiments have been done on the signal processing platform of Mpc8641D as the main processor and V7 FPGA as the preprocessing chip, to prove the feasivility and effectiveness of the driver design method.
出处
《电子设计工程》
2015年第24期139-141,145,共4页
Electronic Design Engineering