摘要
随着应用需求的不断提升,SoC设计规模急剧增大,功能日益复杂,性能要求也越来越高,如何缩短验证时间,提高验证效率和质量以缩短芯片的生产时间成为当今SoC设计领域中最为关注的课题之一。FPGA原型验证是SoC设计的有效途径。在流片前建立一个基于FPGA的高性价比原型验证系统成为SoC验证的重要方法,可以及时发现芯片设计中的缺陷和错误,同时进行软件程序设计,进而缩短SoC芯片的开发周期。描述了以ARM为核心处理器的SoC设计的FPGA原型验证平台实现过程,介绍了怎样利用该平台进行软硬件协同验证,并在此基础上移植了uC/OSII嵌入式操作系统,对该SoC设计进行系统级验证。
With the application requirements constantly promoting and the SoC design size growing,the function is getting more and more complex and the higher requirements are generated for the performance as well. So how to shorten verification time and improve efficiency and quality of test chips to reduce the production time has become one of the greatest concern issues in today's SoC designing field. FPGA prototype verification is an effective verification way of SoC design. FPGA prototype verification system is becoming very important to build a prototype of the SoC before taping out. It can find the shortcomings and mistakes in the chip design in time,and also can save the developing time with software programme design at the same time.In this paper,the implementation of FPGA prototyping verification platform for ARM SoC design flow is described,as well as how to progress hardware and software co- verification. As a result,the uC / OS- II embedded operating system is transplanted and the system level verification of the SoC design is conducted.
出处
《微处理机》
2015年第6期15-18,21,共5页
Microprocessors