DSP和FPGA的双核并行通信方法设计与应用

Design and Application of Dual-core Parallel Communication Method for FPGA and DSP

为解决雷达信号处理系统双核通信问题,设计了两种DSP和FPGA之间的并行通信方法,分别通过DSP的外部接口XINTF访问FPGA内部FIFO和双口RAM,利用DSP的读写使能信号作为FIFO和RAM的读写时钟信号。通过对两种并行通信方法进行对比分析,指出雷达信号处理系统中双核通信应该采用DSP和FPGA内部FIFO的方法。

In order to solve the problem of dual-core communication in the radar signal processing system, two methods of parallel com- munication between DSP and FPGA are designed. The two methods access FPGA internal FIFO and dual port RAM through the external interface XINTF of DSP. The read and write enable signals of DSP are used as the read and write clock signals of FIFO and dual-port RAM of FPGA. The internal FIFO dual-core communication between DSP and FPGA is a better choice in the radar signal processing sys tern after comparing the two methods.