基于PCIe的高速接口设计

Design of high-speed interface based on PCIe

PCIe总线是第三代I/O总线的代表,提供高性能、高速、点到点的串行连接,支持单双工传输,通过差分链路来互连设备。该设计由Xilinx公司的Virtex-6FPGA平台和PC机组成,为了实现PFGA与CPU之间的高速通信,开发了基于FPGA IPcore的PCIe总线DMA数据传输平台。通过硬件测试表明,该接口设计方案成本低,传输速率可以达到1.5Gb/s。

PCIe bus is the representative of the third-generation I/O bus, which provides high-performance, high-speed, point to point serial connection, supports single duplex transmission, interconnects devices using differential. This bus was designed using Xilinx＇ s Virtex-6 FPGA platform and PC. In order to achieve high-speed communication between the FPGA and the CPU, we developed DMA data transmission platform of PCIe bus based on IP core. Software simulation and hardware tests show that the interface design costs low , transmission rate can reach 1.5 Gb/s, this design platform can meet the requirements of the rate.