摘要
提出了一种编码器硬件接口电路嵌入式系统方案,采用Verilog硬件描述语言在FPGA芯片上实现绝对值编码器信号抗干扰处理和实时数据采集,所采集的信号稳定可靠、抗干扰能力强。系统工程化应用结果验证了该方法的有效性。
It proposed an embedded system structure of encoder hardware interface circuit which can realize signal anti-jamming disposal and capture the real time serial data of absolute encoder through hardware description language of Verilog on FPGA chip. Encoder signal abstraction based on FPGA chip is stable and reliable and has high anti-jamming ability. Engineering application results verified the effectiveness of this method.
出处
《大功率变流技术》
2015年第6期64-68,共5页
HIGH POWER CONVERTER TECHNOLOGY
基金
国家科技支撑计划项目(2012BAF09B02)