1Shende V V,Prasad A K,Markov I L, et al. Synthesis of re-versible logic circuits. IEEE Trans Computer -Aided DesignIntegrated Circuits System, 2003,22 (6) : 723-729.
2Dueck G W,Maslov D. Reversible function synthesis wilhminimum garbage outputs. In Proc 6th Int Symp RepresentMethodol Future Comput Technol. Trier, 2003:154-161.
3P Kerntopf. A new heuristic algorithm for reversible logic syn-thesis. In Proc Design Automation Conf. San Diego, 2004:834-837.
4Agrawal A, Jha N K. Synthesis of reversible logic. In Design,Automation and Test in Europe Conference and Exhibition.Paris. 2004:1384 - 1385.
5Gupta P, Agrawal A, Jha N K. An Algorithm for Synthesis ofReversible Logic Circuits. IEEE Computer -Aided Design ofIntegrated Circuits and Systems, 2006, 25 ( 11) : 2317 -2330.
6Maslov D,Dueck G W, Miller D M. Toffoli network synthesiswith templates. IEEE Trans Computer-Aided Design Integrat-ed Circuits System,2005,24 (6) : 807-817.
7W Q Li, H W Chen, Z Q Li. Application of semi-template inreversible logic circuit. In Proceedings of the 11th Interna-tional Conference on CSCWD,Melbourne, Australia, 2007,155-161.
8R. M. Mazder, G. W. Dueck, and A. Banerjee. Optimization ofreversible circuits using reconfigured templates. In 3rd Work-shop on Reversible Computation,July 2011, 143 -154.
9Md. Mazder Rahman and Gerhard W. Dueck. An Algorithm toFind Quantum Templates.In WCCI 2012 IEEE World Congresson Computational Intelligence, Brisbane, Australia,june 2012,623-629.
10J. H. Holland. Genetic algorithms and the optimal allocationsof trials. SIAM J. Computing, 1973,2 (2) : 88-105.