摘要
为了实现对条码的在线采集,对采集对象进行实时检测和进一步处理,基于FPGA芯片,利用Verilog语言采用自顶向下的设计方法对图像采集电路进行了设计。图像采集单元与上位机之间通过UART进行通信,通过编码器的控制实现对条码的图像采集。其中,使用硬件描述语言对于CCD和AD芯片驱动时序的实现方法进行了设计。经过平台调试,结果表明:基于FPGA的图像采集电路实现了图像的实时采集,为提高条码的检测速度和效率提供了保证。
In order to implement liner array Data acquisition for Barcode and real-time detection and further processing for collected object data,this paper presents a design of image capture circuit based on FPGA chip,using top-down design with Verilog. The image data acquisition unit implements Barcode image data collection controlled by encoder and communicates with host computer through UART. In the paper,CCD and AD chips' driving time sequence are realized with hardware description language. After platform debugging,it shows that a real-time image acquisition is achieved from image acquisition based on FPGA and it provides a guarantee for improving the detection speed and efficiency for barcode.
出处
《北京印刷学院学报》
2015年第6期42-46,50,共6页
Journal of Beijing Institute of Graphic Communication
基金
北京市教育委员会(TJSHG201310015016)
北京印刷学院学科专项(210900115006)