基于改进遗传算法的3DNoC低功耗映射研究

Research on low-power mapping for three-dimensional network-on-chip based on inproved genetic algorithm

二维片上网络(Two-Dimensional Network-on-Chip,2DNoC)在面积、功耗、布局布线、封装密度等方面都已达到了瓶颈。与2DNoC相比,三维片上网络(Three-dimensional Network-on-Chip,3DNoC)有着诸多优势,因此3DNoC逐渐成为一个重要的研究方向。随着3DNoC集成度的提高,低功耗映射逐渐成为研究热点。将贪心算法的思想与遗传算法相结合提出一种改进的遗传算法,用以解决3DNoC低功耗映射问题,相对于传统遗传算法,改进遗传算法具有更优的搜索能力。仿真结果表明,采用改进后的遗传算法解决3DNoC映射问题可以降低功耗,从总体趋势来看随着处理单元数量的增加功耗降低幅度逐渐增大,在120个处理单元情况下总功耗可降低14%。

The development of Two-Dimensional Network-on-Chip（2DNoC）has reached a bottleneck in terms of area,power consumption, layout, packaging density etc. Compared with 2DNoC, Three-Dimensional Network-on-Chip（3DNoC）has lots of advantages and has gradually become an important research field. With the improvement of 3DNoC integration,low-power mapping has become a research hot spot. In this paper, greedy algorithm is combined with genetic algorithm,forming an improved genetic algorithm to solve low-power mapping problem for 3DNoC. The improved genetic algorithm has better search ability than traditional genetic algorithm. Simulation results show that the total power consumption of improved genetic algorithm solving 3DNoC mapping is decreased. From the general trend, with the increase of the number of processing elements, the improvement has become more obvious. The total power consumption can be reduced by 14% at most in the case of 120 processing elements.