期刊文献+

Temperature dependent interfacial and electrical characteristics during atomic layer deposition and annealing of HfO_2 films in p-GaAs metal–oxide–semiconductor capacitors 被引量:2

Temperature dependent interfacial and electrical characteristics during atomic layer deposition and annealing of HfO_2 films in p-GaAs metal–oxide–semiconductor capacitors
原文传递
导出
摘要 We have investigated the temperature dependent interfacial and electrical characteristics of p-GaAs metal-oxide-semiconductor capacitors during atomic layer deposition (ALD) and annealing of HfO2 using the tetrakis (ethylmethyl) amino hafnium precursor. The leakage current decreases with the increase of the ALD tem- perature and the lowest current is obtained at 300 ℃ as a result of the Frenkel-Poole conduction induced leakage current being greatly weakened by the reduction of interfacial oxides at the higher temperature. Post deposition annealing (PDA) at 500 ℃ after ALD at 300 ℃ leads to the lowest leakage current compared with other annealing temperatures. A pronounced reduction in As oxides during PDA at 500 ℃ has been observed using X-ray pho- toelectron spectroscopy at the interface resulting in a proportional increase in Ga203. The increment of Ga203 after PDA depends on the amount of residual As oxides after ALD. Thus, the ALD temperature plays an important role in determining the high-k/GaAs interface condition. Meanwhile, an optimum PDA temperature is essential for obtaining good dielectric properties. We have investigated the temperature dependent interfacial and electrical characteristics of p-GaAs metal-oxide-semiconductor capacitors during atomic layer deposition (ALD) and annealing of HfO2 using the tetrakis (ethylmethyl) amino hafnium precursor. The leakage current decreases with the increase of the ALD tem- perature and the lowest current is obtained at 300 ℃ as a result of the Frenkel-Poole conduction induced leakage current being greatly weakened by the reduction of interfacial oxides at the higher temperature. Post deposition annealing (PDA) at 500 ℃ after ALD at 300 ℃ leads to the lowest leakage current compared with other annealing temperatures. A pronounced reduction in As oxides during PDA at 500 ℃ has been observed using X-ray pho- toelectron spectroscopy at the interface resulting in a proportional increase in Ga203. The increment of Ga203 after PDA depends on the amount of residual As oxides after ALD. Thus, the ALD temperature plays an important role in determining the high-k/GaAs interface condition. Meanwhile, an optimum PDA temperature is essential for obtaining good dielectric properties.
出处 《Journal of Semiconductors》 EI CAS CSCD 2015年第12期87-90,共4页 半导体学报(英文版)
基金 supported by the Advance Research Project of China(No.5130803XXXX) the National Natural Science Foundation of China(No.61176070)
关键词 GaAs metal-oxide-semiconductor capacitor TEMPERATURE interface leakage current GaAs metal-oxide-semiconductor capacitor temperature interface leakage current
  • 相关文献

参考文献32

  • 1Yamasaki K, Asai K, Mizutani T, et al. Self-align implantation for n+-layer technology (SAINT) for high-speed GaAs ICs. Electron Lett, 1982, 18:119.
  • 2Datta S, Dewey G, Fastenau J, et al. Ultrahigh-speed 0.5 V supply voltage Ino.7Ga0.3As quantum-well transistors on silicon sub- strate. IEEE Electron Device Lett, 2007, 28:685.
  • 3McMorrow D, Boos J B, Knudson A R, et al. Charge- collection characteristics of low-power ultrahigh speed, meta- morphic A1Sb/InAs high-electron mobility transistors (HEMTs). IEEE Trans Nucl Sci, 2000, 47:2662.
  • 4Del Alamo J A. Nanometre-scale electronics with III-V com- pound semiconductors. Nature, 2011,479:317.
  • 5Zhu S Y, Xu J P, Wang L S, et al. Compare of interfacial and electrical properties between A1203 and ZnO as interracial pas- sivation layer of GaAs MOS device with HtTiO gate dielectric. Journal of Semiconductors, 2015, 36:034006.
  • 6Martens K, Wang W, De K K, et al. Impact of weak Fermi-level pinning on the correct interpretation of III-V MOS CV and GV characteristics. Microelectron Eng, 2007, 84:2146.
  • 7Liu C, Zhang Y M, Zhang ~ M, et al. Interfacial characteristics of A1/A1203/ZnO/n-GaAs MOS capacitor. Chin Phys B, 2013, 22:076701.
  • 8He G, Zhang L D, Liu M, et al. HfO2-GaAs metal-oxide- semiconductor capacitor using dimethylaluminumhydride- derived aluminum oxynitride interfacial passivation layer. Appl Phys Lett, 2010, 97:062908.
  • 9Koveshnikov S, Tsai W, Ok I, et al. Metal--oxide-semiconductor capacitors on GaAs with high-k gate oxide and amorphous sili- con interface passivation layer. Appl Phys Lett, 2006, 88:022106.
  • 10Wieder H. Surface Fermi level of III-V compound semiconductor-dielectric interfaces. Surf Sci, 1983, 132: 390.

引证文献2

二级引证文献1

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部