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心电信号采集的模拟前端集成电路设计 被引量:3

Design of analog front-end IC for ECG signal acquisition
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摘要 基于SMIC 0.18μm 1P6M CMOS混合工艺设计了一种适用于心电信号采集的模拟前端集成电路,主要由前置放大器、带通滤波器、工频滤波器及后级放大器等组成。通过采用低噪声前置放大器技术,有效地改善了模拟前端集成电路的信噪特性;通过采用陷波器技术,有效地抑制了50 Hz工频干扰信号。模拟前端集成电路获得了43.44 d B的中频增益以及通带为0.095 6—107.3 Hz;在0.1 Hz与100 Hz频率处,模拟前端集成电路分别获得15.1μV/Hz与745 n V/Hz的等效输入噪声电压;在1.8 V电源电压条件下,模拟前端集成电路的静态功耗仅为912.5 n W。仿真结果表明,所设计的模拟前端集成电路适合于心电信号采集要求。 A kind of analog front-end IC for Electrocardiogram( ECG) signal acquisition is designed in SMIC 0. 18μm1P6M CMOS mixed-signal process,which includes pre-amplifier,band-pass filter,notch filter of power frequency and postamplifier. Performance of signal to noise is effectively improved by adopting low noise preamplifier in the analog front-end IC. 50 Hz power interference can be effectively rejected by adopting the technique of notch filter. The analog front-end IC achieves an IF gain of 43. 44 d B and a passband ranging from 0. 0956 Hz to 107. 3 Hz. The analog front-end IC at 0. 1 Hz and 100 Hz achieves the equivalent input noise voltage of 15. 1 μV /Hz and 745 n V /Hz respectively. The standby power consumption of the designed analog front-end IC is only 912. 5 n W with 1. 8 V power supply voltage. Simulation results show that the designed analog front-end IC is suitable for the requirement of ECG signal acquisition.
出处 《重庆邮电大学学报(自然科学版)》 CSCD 北大核心 2016年第1期66-71,共6页 Journal of Chongqing University of Posts and Telecommunications(Natural Science Edition)
基金 国家自然科学基金(61102075 61301124 61471075) 国家物联网发展专项基金 重庆市教委科学技术研究项目(KJ120503) 重庆高校创新团队建设计划(智慧医疗系统与核心技术创新团队) 重庆创新青年人才培养项目(cstc2013kjrcqnrc10001) 重庆"121"科技支撑示范工程(cstc2014jcsfglyjs X0028 cstc2014zktjccxyy BX009)~~
关键词 无线体局域网 心电信号 模拟前端集成电路 陷波器 wireless body area network electrocardiogram signal analog front-end IC notch filter
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参考文献13

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