SMS4算法串行化设计及其轻量级电路实现

Serialized design of SMS4 and lightweight implement

通过数据通路共享以及核心功能模块的串行化设计对SMS4算法进行了优化,设计实现了小面积低成本的SMS4算法.该算法能广泛应用于智能卡、物联网等领域.为了实现小面积低成本的SMS4算法,采用串行的设计方式,对核心模块进行分时复用,并共享加密和密钥扩展的数据通路;同时,采用电路实时产生常数的方法来进一步减小电路面积,8bit的数据通路中只包含8个D触发器和一个和常数加7的电路,只占用66个等效门（GE）.在ASIC实现上,设计的SMS4电路占用3 824GE,除去密钥扩展模块为2 493GE,与已有结果比面积减小18.52%;在FPGA实现上,设计的SMS4占用逻辑资源只有现有结果的20%~40%.

A small area and low cost SMS4 algorithm was optimized with datapath sharing and serial‐ized design .The optimized SMS4 algorithm can be widely used in area like smart cards and internet of things etc .In order to implement the SMS4 algorithm with small area and low cost ,a serialized data‐path was shared by encryption and key expansion .A core function module was reused in division time .To smaller the size ,constant parameters was generated in real time by 8 DFFs （D‐type flip‐flops） with a constant add 7 circuit ,which only contained 66 gate equivalent （GE） .The designed SMS4 implement on ASIC contains 3 824 GE ,and 2 493 GE excluding the key expansion module , w hich is 18 .52% smaller than paper proposed .On FPGA （field‐programmable gate array ） ,the de‐signed SMS4 only consumes 20% ~40% logic resources compared to other papers .