轨道交通设备中FPGA芯片等效性验证方法

Equivalence Checking Method of FPGA in Rail Transit Equipment

FPGA芯片综合及布局布线后的功能验证对于保证设计可靠性有重要意义,目前常用的后仿真验证方法存在两个问题,一个是复杂度大时间较长,另一个是异常状态的测试覆盖率不足。提出利用等效性检查进行功能验证的方法,并给出主流厂商芯片的验证流程及异常处理措施。与后仿真的验证方法相比,本方法验证工作量更低,测试覆盖率高,对提高设计可靠性有重要作用。

Verification of the FPGA netlist generated by Synthesis or Place ＆ Route has great importance for ensuring the design reliability. The post-synthesis simulation method widely used now has two major problems. One is the complexity with a long process, the other is the test coverage deficiency. The paper puts forward a verification method using equivalence checking and presents the verification process of FPGAs from majority manufacturers and the false treatment solutions. Comparing with post-synthesis simulation method, the equivalence checking method has lower cost and higher test coverage and would benefit greatly the design reliability.