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X射线脉冲星导航硬件脉冲轮廓累积研究 被引量:2

Hardware epoch superposition of X-ray pulsar-based navigation
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摘要 为了在X射线脉冲星地面实验系统仿真源模拟产生X射线的基础上,能够快速稳定地得到脉冲轮廓,采用硬件历元叠加的方法获得脉冲轮廓。研究了用硬件实现历元叠加及其数据整合的算法,该算法首先在MATLAB现场可编程逻辑阵列(FPGA)中实现,再通过MATLAB硬件描述语言(HDL)代码生成模块把算法转换成HDL,经编译后获得配置硬件的Bit文件,最终在开发板FPGA上实现数据处理的硬件模块。一段时间内的光子到达时间数据通过MATLAB算法得到的脉冲轮廓数据与通过硬件模块处理后得到的数据结果存在误差,在单个时间窗口内误差最大值为2个光子数,误差平均值占光子数统计平均值的0.084%;两组统计的脉冲轮廓数据中不同数据占总数据个数的9.481%,这样的误差不影响后端模拟导航模块的导航。利用硬件实现的历元叠加及其数据整合模块具有处理速度快、设备紧凑、功耗低的特点,为航天器利用X射线脉冲星导航提供了一种可行的硬件数据处理技术上的支持。 Based on the X-rays pulsar-based source simulation produced by the ground experimental system, using the method of hardware epoch superposition, the pulse profile is obtained fast and stable. The algorithm of epoch superposition and data integration implemented by the field programmable gate arrays (FPGA) has been studied that is firstly achieved by using MATLAB then converted to hardware description language (HDL) by MATLAB HDL Coder. Secondly, the stream file of Bit can be obtained, configuring the hardware by the compiler. Finally, the hardware module can be practicable in the FP- GA. The arrived time data of photons obtained by MATLAB algorithm has some errors with the data obtained after the treat- ment of the hardware modules; the maximum error is two photon numbers in the single time window, and the average error value accounts for 0. 084 % of the average statistic value; the different data accounts for 9. 481% of the total number of data in the two sets of statistical pulse profile data. Such errors do not affect the navigation of the subsequent navigation module. The hardware implementation and data integration epoch superposition modules get high processing speed, compact device and low power consumption, which provides viable data processing hardware technical support for spacecraft navigation using X-ray pulsars.
出处 《航空学报》 EI CAS CSCD 北大核心 2016年第2期662-668,共7页 Acta Aeronautica et Astronautica Sinica
基金 国家自然科学基金(11103069 61007017)~~
关键词 脉冲星 硬件处理 现场可编程逻辑阵列(FPGA) 硬件设计 信号源 pulsar hardware processing field programmable gate arrays (FPGA) hardware design signal sources
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