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面向航电系统的Power架构双核处理器系统设计

Avionics System-oriented Design of Dual-core Processor System Based on Power Architecture
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摘要 航电系统在需求牵引和技术推动下正朝着高度综合化的方向发展,大量的红外、射频、信号处理、数字处理模块被集成在单一系统中,对系统的处理器性能、数据带宽提出了更高的挑战。而单一地提高处理器工作频率已经无法明显提升系统整体性能,并且会带来功耗、散热等问题。双核处理器解决方案可以在处理器主频不变的情况下将可执行的指令数增加一倍。航电系统综合化、小型化和低功耗的需求以及工艺水平的提升,为单芯片集成多处理器内核的设计提供了支撑。文中提出一种面向综合化航电系统的Power架构双核处理器系统设计方案。首先对双核处理器系统架构进行描述,在此基础上详细分析了总线互连、复位策略、存储一致性等关键技术。该方案可广泛应用于高度综合化航电系统设计领域。 With the development trend of high-integration in avionics system under requirement and technique, more and more modules such as infrared devices, radio frequency devices, DSPs are integrated in a single system, which leads to a higher challenge to CPU performance and data bandwidth. The rise of CPU frequency solely would not promote the system performance and would cause problems of power consumption and heat radiation. The method of dual-core will double the number of instructions without changing the CPU frequency. The needs of integration, miniaturization and lower power-consumption in avionics system and development of technology brings supports to the design of multi-cores integrated in a single chip. A design scheme of integrated avionics system-oriented design of dualcore processor based on Power architecture is proposed. First, the architecture of dual-core processor is described, based on which analyzes bus interconnection, reset strategy,memory consistency in details. This scheme can widely adopt to design field of highly integrated avionics system.
出处 《计算机技术与发展》 2016年第3期190-192,共3页 Computer Technology and Development
基金 中国航空工业集团公司创新基金(2010BD63111)
关键词 POWER架构 双核 总线互连 存储一致性 Power architecture dual-core bus interconnection memory consistency
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