一种低增益波动模拟矢量相加移相器的设计

Design of an Analog Vector-Sum Phase Shifter with Low Gain Variation

提出了一种应用于模拟矢量相加移相器中增益控制模块的新型反馈电路,以减少增益波动。采用SMIC 0.18μm CMOS工艺进行了原理图与版图设计,可在2~3GHz频率范围内工作,版图尺寸为0.7 mm×0.64 mm。仿真结果显示,在2.45GHz频率处,该电路的插入损耗小于8dB,输入1dB压缩点P1dB为2dBm,增益波动小于0.7dB,优于目前已发表文献中的同类电路。

A new feedback circuit used in the gain control block of the analog vector-sum phase shifter was proposed to reduce the gain fluctuation.The schematic and layout were designed based on SMIC 0.18μm CMOS process.The circuit could operate in the frequency range between 2GHz and 3GHz.The size of the layout was 0.7mm×0.64 mm.The simulation results showed that the insertion loss was less than 8dB,the gain variation was less than 0.7dB,and the input 1dB compression point P1 dBwas 2dBm at 2.45 GHz.The gain variation of the circuit was smaller than the published results so far.