期刊文献+

一种在线网络安全处理器SoC的IPSec加速器 被引量:1

An IPSec Accelerator for Online Network Security Processor SoC
下载PDF
导出
摘要 对高速在线网络安全处理器中IPSec协议处理部分进行设计,完成了传输模式和隧道模式下网络数据包的认证头(AH)和安全封装载荷(ESP)处理。对IPSec加速器的可配置性和功能进行了FPGA验证,并在一款单通道10Gb/s在线网络安全处理器中实现了AH协议传输模式IPSec加速器的ASIC验证。测试结果表明,在200MHz时钟频率下,单个AH协议模块在传输模式下的数据吞吐率达到1.5Gb/s,通过并行的方式可以满足不同性能的网络安全需求。 The IPSec protocol processing part in the online high speed network security processor was designed,which could process AH and ESP of network packets under both transmission mode and tunnel model.Besides,the configuration and function of the IPSec accelerator was verified with FPGA,and the ASIC verification of the IPSec accelerator which could implement AH protocol under transmission model in a single channel online network security processor with 10Gb/s date rate was also completed.The simulation results showed that the throughput data rate reached 1.5Gb/s in a single AH protocol block under transmission mode at a clock frequency of 200 MHz.It could meet the network security requirements with different performances by parallel method.
出处 《微电子学》 CAS CSCD 北大核心 2016年第1期90-94,共5页 Microelectronics
基金 国家自然科学基金资助项目(61371011) 深圳市基础研究项目(JCYJ20130401173716277)
关键词 IPSEC 认证头 封装安全载荷 网络安全处理器 IPSec AH ESP Network security processor
  • 相关文献

参考文献8

  • 1IETF network working group. RFC2401. Security architecture for the internet protocol [S]. 1995.
  • 2HA C S, LEE J H, I.EEM D S, et al. ASIC design of IPSec hardware accelerator for network security [C]// Proceed IEEE Asia-Pacific ('onf Advan Syst Integr Circ. 2004: 168-171.
  • 3NISHIDA Y, KAWAI K, KOIKE K, et al. 1 Gbit/s bidirectional full-wire rate communication I.SI for residential gateways [C]// IEEE Symp VLSI Circ. Kyoto, Japan. 2007:138 139.
  • 4WISHBONE system-on-chip ( SoC ) interconnection architecture of portable IP cores [EB/OL]. http://cdn. opencores, com/downloads/wbspec_b4, pdf, 2011.
  • 5刘洋.10Gbps网络安全处理器关键模块设计与实现[D].北京:清华大学微电子学研究所,2013.
  • 6WU Liji, JI Yingjie, ZHANG Xiangmin, et al. Power analysis resistant AES crypto engine design for a network security co-processor [J]. J Tsinghua Univ (Sci ~ Tech), 2009, 49($2): 2097-2102.
  • 7MCKEOWN N. The iSI.IP scheduling algorithm for input-queued switches [J]. IEEE/ACM Trans Network, 1999, 7(2)I 188-201.
  • 8IEEE Computer Society. IEEE Std. 1666. SystemC language reference manual[S]. 2005.

同被引文献10

引证文献1

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部