一款基于CMOS工艺的可编程VCXO芯片设计

Design of a Programmable VCXO Chip Based on the CMOS Technology

详细介绍了一款基于0.25μm射频互补金属氧化物半导体(RF CMOS)工艺的可编程压控晶体振荡器(VCXO)芯片。将A/D技术和小数锁相环技术结合在一起,实现了VCXO输出频率范围、频率步进、牵引范围、压控极性可编程。在0.25μm RF CMOS工艺下进行了流片,芯片面积为3 000μm×2 000μm,将芯片封装到符合工作标准的5 mm×7 mm陶瓷管壳。测试结果表明,该芯片在(2.5±5%)V,温度为-55~85℃环境下,可以稳定工作,通过兼容工业标准I2C接口,实现编程输出频率为15.5~866.6 MHz和975~1 300 MHz,频率步进(343/N)Hz(N为锁相环输出分频器值);牵引范围为±9×10-6~±567×10-6,步进9×10-6;在频点662.41 MHz,均方根抖动典型值为360 fs(积分区间12 k Hz^20 MHz)。测试结果验证了设计方法和电路设计的正确性。

A programmable voltage controlled crystal oscillator（ VCXO） chip based on 0. 25 μm RF CMOS technology was presented in detail. The A / D techniques and fractional phase locked loop techniques were productively combined together to realize that the output frequency range,frequency step size,pull range and voltage controlled polarity programmable. The chip was implemented in 0. 25 μm RF CMOS process,the die area was 3 000 μm × 2 000 μm,and it was available in industry standard5 mm×7 mm surface mount ceramic package. The measurement results show that the chip can work stabi-lity at（ 2. 5 ±5%） V from-55 ℃ to 85 ℃. It can be programmable using an industry standard I2 C interface,and can generate any frequency from 15. 5 MHz to 866. 6 MHz,from 975 MHz to 1 300 MHz,with a frequency step size of（ 343 / N） Hz（ N： PLL post divider value）,the pull range from ±9 ×10^-6 to ±567 ×10^-6,step of 9×10^-6. At the typical frequency of 622. 41 MHz,the RMS（ root mean square） jitter performance is about 360 fs（ the jitter is integrated from 12 k Hz to 20 MHz）. The test results verify the validity of the design method and circuit design.