摘要
单比特数字接收机是解决信号处理带宽和处理速度之间矛盾的一种折衷技术。主要介绍一个基于单比特ADC和FPGA的超宽带单比特数字接收机，描述了接收机的硬件设计、关键信号仿真和固件设计。测试结果表明，该接收机能适应2～6GHz频段内的瞬时测频功能，最大采样率为12Gsps，瞬时带宽可达4GHz。在电子战及宽带无线通信领域有很高的应用价值。
Monobit digital receiver technique is a trade-oil between signal processing oanuwlum anu processing rate. An uhra-wideband monobit digital receiver is introduced based on the monobit ADC and the FPGA, and the hardware design, key signal simulation and firmware design of the receiver are described. The test results show that the receiver can adapt to the instantaneous frequency meas- urement （IFM） in 2 -6 GHz frequency band. The maximum sampling rate is 12 Gsps, and the in- stantaneous bandwidth can be up to 4 GHz. The receiver is of high application value in the fields of the EW and the wideband wireless communication.
出处
《雷达与对抗》
2016年第1期48-51,59,共5页
Radar & ECM
