摘要
为了同时达到高性能和灵活性的目标,提出一种基于现场可编程门阵列的参数化多标准自适应基4 Viterbi译码器。译码器采用3~9可变约束长度,1/2、1/3可变码率,支持任意截断长度的纠错译码,并采用码字无符号量化、加比选单元设计优化和归一化判断逻辑分离策略优化关键路径设计,提高译码器工作频率。实验结果表明,该译码器能根据用户设定的参数改变结构,在多种通信标准之间实现动态切换;性能达到了541 Mbps,明显优于相关工作;对GPRS,Wi MAX,LTE,CDMA,3G等通信标准都取得了良好的误码性能,可满足多种通信标准的译码需求。
To achieve the goal of high performance and flexibility,a parameterized multi-standard adaptive radix-4 Viterbi decoder based on the field-programmable gate array was presented. This decoder adopts constraint lengths ranging from 3 to 9,code rates of 1 /2 or 1 /3 and supports error-correcting decoding of arbitrary truncation lengths. The unsigned quantization,add-compare-select unit optimization and normalization judgment logic separation strategies were used to optimize the design of critical path,so that it can improve system throughput. Experiment results show that: the decoder can change the structures according to the parameters set by users and achieve dynamic switching in multiple communication standards; the throughput can reach up to 541 Mbps,apparently superior to the related works; the decoder achieves low bit error ratio in multiple standards such as GPRS,Wi Max,LTE,CDMA and 3G and satisfies the decoding requirements of multiple communication standards.
出处
《国防科技大学学报》
EI
CAS
CSCD
北大核心
2016年第1期86-92,共7页
Journal of National University of Defense Technology
基金
国家自然科学基金资助项目(61202127)
湖南省学位与研究生教育专项基金资助项目(YB2013B008)