基于FPGA实现的归一化空时自适应抗干扰技术

A Realization of Normalized Space-time Adaptive Anti-jamming Based on FPGA

针对压制干扰源提出一种基于FPGA实现的归一化空时自适应抗干扰技术。通过主通道功率统计值调节步长因子,达到归一化处理的目的,当x(n)较大时,可以解决梯度噪声放大的问题,有效地提高了算法的抗干扰能力;不需要计算u(n)的平方欧氏范数,不包含除法运算,减少了计算量,易于FPGA工程实现;通过计算机仿真分析和外场试验验证了该技术有效地提高了算法收敛速度和干扰抑制能力。

This paper represented a normalization STAP （Space-Time Adaptive Processing） Anti-jam technology base on FPGA realization. Using frequency statistical information of major channel adjusts step-factor. Realizing normalization process has two advantages. First, When the value of x（n） is large, the problem of gradient noise amplification will be solved, and the performance of anti-jam will be improved effectively. Second, the square Euler-norm of u （n） will not be calculated, so it is of simple calculation and easy realization on FPGA. Though the simulation analysis by computer and the result of real testing, the normalization process improve the speed of arithmetic convergence and the performance of anti- jam everltually.