摘要
EDA代表了当今电子设计技巧的最新发展方向,利用EDA工具,电子设计师可以从概念、算法、协议等开端设计电子系统,大批工作可以通过计算机完成,并可以将电子产品从电路设计、性能分析到设出IC版图或PCB版图的全部过程在汁算机上主动处理完成。但EDA技术在优化方式上,却存在着一定的弱势,本文提出的流水线法新型优化方式,是指把耗时较长、单时钟周期内难以完成的并行执行的逻辑块分割开,提取出相同的逻辑模块,在时间上复用该模块,用多个时钟完成相同的功能,然后对耗时较长的模块进行分解,分解的原则为各个子模块逻辑延时大致相当,从而能够大幅度的提升物理电路性能,能在一定程度上解决EDA技术优化不足的问题。
EDA represent the latest development of todayˊs electronic design skills,the use of EDA tools,elec-tronic designers can design concept from the beginning,algorithms,protocols and other electronic systems,a large number of work can be done by computer and electronic products can be from the circuit design,perform-ance analysis to set up the whole process of IC layout or PCB layout on the computer initiative juice processing is completed.But EDA technology in the optimization of the way,but there are some weak pipeline of new opti-mization method presented herein,refers to the time-consuming,difficult to complete a single clock cycle logic block parallel execution split open to extract the same the logic module,in time multiplexing principle of the module,with multiple clock accomplish the same function,and then lengthy modules the decomposition of each sub-module logic delay roughly,thereby greatly enhance physical circuit performance,can solve the problem of insufficient EDA technology to optimize certain extent.
出处
《大学物理实验》
2016年第2期97-99,共3页
Physical Experiment of College
基金
东乡族文献资料数据库建设研究(15XTQ007)
关键词
EDA
流水线
优化
延时
时钟频率
EDA
pipeline
optimization
delay
clock frequency