期刊文献+

基于LPIND的硅基等离子天线

Silicon-based plasma antenna based on LPIND
下载PDF
导出
摘要 首先介绍了LPIND(Lateral Positive-Intrinsic-Negative Diode)及其在硅基等离子天线方面的应用,并对LPIND进行建模,仿真分析了不同SOI(Silicon On Insulator)埋层材料对LPIND本征区载流子浓度的影响,仿真结果显示,LPIND的自加热效应会降低本征区载流子浓度,通过改变埋层材料,增加埋层的热导率,可以减弱自加热效应。其次给出了LPIND本征区电导率的仿真结果,完成了基于LPIND的半波偶极子天线的设计与仿真,仿真结果显示,本征区电导率和硅衬底厚度会影响天线的回波损耗(S11)。最后总结了降低LPIND静态功耗的有效设计方法。 The LPIND(Lateral Positive-Intrinsic-Negative Diode)and its application in silicon-based plasma antenna are introduced.The LPIND model is established.The effect of SOI(Silicon On Insulator)buried layer of different material on LPIND intrinsic carrier concentration are simulated and analyzed.Simulation results show that self-heating effect of LPIND can decrease intrinsic carrier concentration.Changing material or increasing thermal conductivity of buried layer can reduce self-heating effect.The conductivity of intrinsic layer is simulated.Half-wave dipole silicon-based plasma antenna based on LPIND array is designed and simulated.Simulation results show that return loss(S11)of half-wave dipole silicon-based plasma antenna is influenced by the conductivity of intrinsic layer and silicon substrate thickness.The effective design methods are proposed to reduce static power of LPIND.
出处 《中国科技论文》 CAS 北大核心 2016年第2期134-138,共5页 China Sciencepaper
基金 国家自然科学基金资助项目(61401237) 天津市自然科学基金资助项目(13JCQNJC01200) 高等学校博士学科点专项科研基金资助项目(20130031120034) 国家级大学生创新创业训练计划资助项目(201410055056)
关键词 LPIND 自加热效应 硅基等离子天线 低功耗 Lateral Positive-Intrinsic-Negative Diode self-heating effect silicon-based plasma antenna low power
  • 相关文献

参考文献6

二级参考文献68

  • 1江利,王建华,黄庆安,秦明.PIN二极管的研究进展[J].电子器件,2004,27(2):372-376. 被引量:11
  • 2刘平,刘黎刚,邓记才,贾琦.等离子体天线的发射特性[J].郑州大学学报(工学版),2006,27(3):126-128. 被引量:10
  • 3Nakayama H, Su P, Hu C, Nakamura H, Komatsu H, Takeshita K, Komatsu Y. Methodology of Self- heating Free Parameter Extraction and Circuit Simulation for SOl CMOS[C]//Proc. IEEE Custom Integrated Circuits Conf. , 2001:381-384.
  • 4James B Kuo, Shih-Chia Lin. Low-Voltage SOI CMOS VLSI Devices and Circuits [M]. John Wiley & Sons INC. ,2001 :103-104.
  • 5Cheng M C, Yu F, Jun L, Shen M, Ahmadi G. Steady-state and dynamic thermal models for heat flow analysis of silicon-on-insulator MOSFET [J].Microelectron Reliab. , 2004,44:381-396.
  • 6Cheng Ming-C, Yu Feixia. Nonisothermal Effects in SOI CMOS Analog Integrated Circuits Based on Electrothermal Simulation, Solid-State and Integrated Circuit Technology[C]//ICSICT ' 06. 8th International Conference ,2006 :1252- 1255.
  • 7Yu Feixia, Cheng Ming-C. Electrothermal simulation of SOl CMOS analog integrated circuits [J].Solid- State Electronics, 2007,51 (5) : 691-702.
  • 8Cheng Yuhua, Tor A Fjeldly. Unified physical I-V model including self-heating effect for fully depleted SOI/MOSFET's [J]. IEEE Trans. Electron Devices, 1996,43(8) :1291-1296.
  • 9Synopsys-TCAD Manuals [S]. Version A-2008.09.
  • 10Wachutka G. An extended thermodynamic model for the simultaneous simulation of the thermal and electrical behaviour of semiconductor devices[C]//Proceedings of the Sixth International Conference on the Numerical Analysis of Semiconductor Devices and Integrated Circuits (NASECODE VI), Dublin, Ireland, July 1989:409-414.

共引文献14

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部