摘要
本文详细地介绍了利用译码器和计数器这两种不同的逻辑器件来产生多路顺序控制信号的原理电路及其工作过程;在本电路的设计过程中很好地体现了组合逻辑电路设计与时序逻辑电路设计二者之间的有机结合。
This paper introduces a ciruit that can generate multi-state control signals and itscourse of work. The multiplex sequence control-are generated by countheand decoders. This circuit is a good compound of the designs of sequentialand combinational logic cbouit.
出处
《丹东师专学报》
1997年第1期17-19,共3页
Journal of Dandong Teachers College
关键词
计数器
译码器
时序逻辑电路
组合逻辑电路
Counter Decoder
sequential logic circuit
combinational logic circuit