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一种应用于WLAN的高线性度CMOS功率放大器

A CMOS Power Amplifier with High Linearity for WLAN Applications
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摘要 基于TSMC 0.18μm CMOS工艺,设计了一种应用于WLAN的高线性度CMOS AB类功率放大器。电路采用两级结构和片外匹配网络。为了实现高线性度,采用电容补偿技术,并选择合适的偏置点以减小g_m的3次非线性,在绑线和PCB走线时,利用HFSS进行了精确的建模。该功率放大器供电电压为1.8V和3.3V,后仿结果显示,在2.45GHz处的输出1dB压缩点P_(1dB)为25.3dBm,功率附加效率PAE为33%;在WLAN802.11g测试环境下,输入64QAM信号进行仿真,输出误差向量幅度EVM和频谱掩膜均满足指标要求,最大线性输出功率为15dBm。 A CMOS class-AB power amplifier(PA)with high linearity fabricated in TSMC 0.18-μm CMOS technology was demonstrated.It was designed with two stages and off-chip matching network.In order to improve the linearity of the PA,the technology of capacitance compensation was enrolled.The third nonlinearity of gm was reduced by choosing appropriate biasing point.All of the bond-wires and lines on PCB were modeled by HFSS.The supply voltage was 1.8 Vand 3.3 V.The post-layout simulation results showed that the PA could deliver 1dB compression point output power of 25.3dBm with 33% PAE at 2.45 GHz.In the test-bench of WLAN802.11 g,the maximum linear output power was 15 dBm with a 64-QAM stimulus,which met the requirements of EVM and spectral mask.
出处 《微电子学》 CAS CSCD 北大核心 2016年第2期178-182,共5页 Microelectronics
关键词 高线性度 电容补偿 HFSS建模 64QAM信号 High linearity Capacitance compensation HFSS modeling 64-QAM stimulus
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参考文献7

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