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基于时间标记的60皮秒FPGA精密时间测量系统 被引量:5

A 60ps FPGA precise time measurement system based on time-stamping
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摘要 为了记录物理实验中多次事件发生的时间,本文基于时间标记在FPGA上设计了高精度的时间测量系统。该系统测量电路的工作模式可通过上位机发送指令来配置以连接不同的输入及测量电路,从而可以充分利用系统的延迟单元资源。同时,为了解决延迟单元非线性的问题,本文通过码密度测试完成了对延迟链中各个单元延迟时间的测试。集成于上位机软件的校正算法可根据各单元延迟时间对测量结果进行优化。经测量,该系统可以达到63 ps的精度,经过校正算法可将均方根误差(RMSE)从66 ps降低到34 ps。 In order to record the time of multiple events in physics experiments, a high precision FPGA time-measuring system was designed based on time-stamping method. In this system, the working mode of the measurement circuit can be configured by the instructions send from the computer to connect different inputs and measurement circuit, so that the delay cell resources can be fully utilized. At the meantime, code density test was carried out to solve the non-linearity problem of the delay cells. From our test, the accuracy of the system can reach 63 ps and the RMSE can be reduced from 66 ps to 34 ps by applying correcting algorithm.
出处 《电子设计工程》 2016年第8期68-71,共4页 Electronic Design Engineering
基金 国家重大科研仪器设备专项(2013YQ030595)
关键词 时间数字转换 FPGA 延迟单元 时间标记 可配置信道 time-to-digital converter FPGA delay cells time-stamping configurable channels
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