摘要
FFT是常用的数字信号处理方法,论文提出了一种基于FPGA平台的可配置FFT处理器设计方法。该方法采用基2多路延时转接器的流水线结构,由L个可配置的基2运算模块级联组成,不同位置的基2运算模块根据位置配置信息控制数据缓存的读取地址实现基2蝶形运算。FFT处理器基于Verilog语言进行模块化设计,并在Altera公司的Cyclone IV器件上实现。
FFT is the most common method in digital signal processing.In this paper design of reconfigurable FFT processor is implemented based on FPGA.Radix2 multi-path delay commutator and pipeline architecture are adopted in this design,and the FFT processor consists of configurable radix2 calculation modules.Radix2 butterfly calculation is implemented by controlling read address of data caches according location configuration.The FFT processor is described in Verilog language and implemented in Cyclone VI device.
出处
《舰船电子工程》
2016年第5期121-123,共3页
Ship Electronic Engineering
基金
“南山区移动互联技术公共服务平台”(项目编号:KC2014ZDZJ0023A)资助