载波泄漏与I/Q失配矫正技术

Carrier leakage and I/Q mismatch calibrated technique

提出了一种基于数字基带的载波泄漏与I/Q失配矫正方案.该方案只需在射频芯片上引入一条矫正通路,将载波泄漏与I/Q失配量检测出来发送给数字基带,数字基带完成矫正工作,减小了芯片面积和功耗,降低了设计难度.在TSMC 0.13μm CMOS工艺下,系统仿真结果表明,该矫正方案的载波泄漏误差小于1.5%,I/Q失配的相位与幅度矫正误差均小于6.5%.矫正链路的测试结果表明,I/Q幅度的不匹配体现在输入信号两倍的频率上,矫正链路的带宽为20MHz,链路增益变化范围为15dB,步长为5dB.

The carrier leakage and I/Q mismatch calibrated technique based on the digital baseband for the direct conversion transmitter is described. The proposed technique only needs a calibration chain to detect mismatches, and then transmits them to the digital baseband, which completes the calibrated task. The proposed method is very simple in reducing die areas and power dissipation. Under TSMC 0.13μm CMOS technology simulation, the calibrated error of carrier leakage is less than 1.5% and the error of I/Q mismatch is less than 6.5 %. The measurement results indicate that I/Q amplitude mismatch is reflected at twice the input frequency. The calibrated chain gain range is 15 dB with a 5 dB step, and the bandwidth is 20 MHz. Key Words： direct conversion architecture; leakage calibration; I/Q mismatch; direct current offset