高速弹载记录仪存储技术研究

The Research of High Speed Missile-borne Recorder Storage Technology

针对弹载记录仪中NAND型Flash在负延时记录时写入速度低和可靠性差的问题,提出一种新型高速负延时存储方法。在研究NAND型Flash存储器存储介质访问原理的基础上,采用当前成熟的高速率流水线存储技术,设计了一种单通道双控制总线的高速存储结构,解决了当前具有负延时的弹载记录仪存储速度的瓶颈问题。以SOPC技术为基础,将整个控制系统构建在单片FPGA上提高可靠性。试验结果验证了该存储体系结构单通道写入速度可达最高理论值40 MB/s,负延时容量、存储总容量根据要求可设置。

Aimed at the problem of low write speed and poor storage reliability of NAND flash in mis-sile-borne recorder during negative delay recording,a new high-speed negative delay storage method is presented. On the basis of the study of the principle of access to the storage medium in NAND flash memory,the method of a currently mature technology of high-speed pipeline storage was adopted through the design of a high-speed structure of single channel dual bus control,which solved the bottle-neck problem of storage speed of missile-borne recorder with negative delay. Based on SOPC (System On a Programmable Chip ) technology,the whole control system was structured on a single FPGA (Field Programmable Gate Array)for the improvement of reliability. The test results show the write speed in the storage architecture of single channel could reach the highest theoretical value of 40MB/s. In the mean time,the negative delay capacity and the total storage capacity could be set according to the requirements.