摘要
在4H型碳化硅导电衬底上进行N型外延层生长,并对外延层表面进行化学机械抛光;通过高温氧化的方法在表面生成氧化层,并且在NO中进行退火;在此之后,加工碳化硅MOS电容和LMOS;通过C-V测试的方法对Si O2/Si C界面特性进行评估;通过测试的方法对LMOS的场效应迁移率和MOS的击穿电压分布情况进行分析。结果表明,经过表面抛光可大大改善表面形貌,在一定程度上抑制界面态的产生,并且改善沟道导电的一致性。
N-type epitaxial layer was grown on the 4H-SiC conducting substrates and its surface was polished by the method of chemical mechanical polishing(CMP). Oxide layer was grown through high-temperature oxidation and then annealed in NO. After that, silicon carbide MOS capacitors and LMOS were fabricated. The SiO2/SiC interface properties were evaluated through C-V measurements of the MOS. The field effect mobility of LMOS and the distribution of breakdown voltage of MOS were analyzed by the tests. The result shows that the surface morphology and the uniformity of channeling conduction can be improved after CMP, and the generation of interface state can be restrained to some extent.
出处
《智能电网》
2016年第6期546-549,共4页
Smart Grid
基金
国家电网公司科技项目(SGRI-WD-71-14-004)~~