基于VHDL的24进制计数器的程序设计

The Program Design of the 24- Band Counter based on VHDL

24进制计数器的程序设计可以作为《EDA技术与应用》课程的实验项目。该项目可以帮助学生理解数字系统自顶向下的设计方法,加深学生对分频器、计数器以及动态扫描原理的理解,使学生进一步领会VHDL设计方法。本文以MAX+PLUSⅡ为软件设计平台完成程序的设计及编译,并利用达盛EDA实验箱实现硬件仿真。

The program design of the 24-band counter can be used as an experimental project of ＂EDA technology and application＂ course. This project can help students understand the top-down design method of digital system, deepen the understanding of the frequency divider, counter and dynamic scanning principle, so that students can further understand the VHDL design method. In this paper, the design and compilation of the program design is completed using MAX＋PLUS II and the hardware simulation is realized using the EDA Experimental box.