导线图像最大类间方差法及其FPGA实现

Wire Image OTSU Algorithm and its FPGA Implementation

为实现对工业流水线中导线图像的实时预处理,针对最大类间方差法FPGA实现复杂度高和资源消耗等问题,对其算法硬件实现进行了研究。提出了一种资源节约型体系架构,在获得累积直方图统计和累积灰度图统计的基础上,采用二进制对数转换单元代替乘法器和除法器去计算最大类间方差。为满足实时性的要求,采用Altera公司的Cyclone IV系列FPGA芯片来实现最大类间方差法。实验结果表明,该设计能够实时稳定的对导线图像进行分割,分割效果良好。

In order to achieve industrial line conductors in a real -time image pre -processing and slove the problem of Otsu method for FPGA realization of high complexity and resource consumption, the hardware implementation of the algorithm is studied. Resource - saving architecture is proposed on the basis of acquiring the cumulative histogram and the cumulative intensity area, using the binary logarithm transformation unit instead of multiplier and divider to calculate the maximum variance between clusters. In order to meet real- time requirements,Altera＇s Cyclone IV FPGA chip is adopted to realize the Otsu method. Experimental results show that the design can stability split image in real time ,the segmentation effect is good.