摘要
Two-dimensional （2D） crystals have a multitude of forms, including semi-metals, semiconductors, and insulators, which are ideal for assembling isolated 2D atomic materials to create van der Waals （vdW） heterostructures. Recently, artificially-stacked materials have been considered promising candidates for nanoelectronic and optoelectronic applications. In this study, we report the vertical integration of layered structures for the fabrication of prototype non-volatile memory devices. A semiconducting-tungsten-disulfide-channel-based memory device is created by sandwiching high-density-of-states multi-layered graphene as a carrier-confining layer between tunnel barriers of hexagonal boron nitride （hBN） and silicon dioxide. The results reveal that a memory window of up to 20 V is opened, leading to a high current ratio （〉103） between programming and erasing states. The proposed design combination produced layered materials that allow devices to attain perfect retention at 13% charge loss after 10 years, offering new possibilities for the integration of transparent, flexible electronic systems.
Two-dimensional （2D） crystals have a multitude of forms, including semi-metals, semiconductors, and insulators, which are ideal for assembling isolated 2D atomic materials to create van der Waals （vdW） heterostructures. Recently, artificially-stacked materials have been considered promising candidates for nanoelectronic and optoelectronic applications. In this study, we report the vertical integration of layered structures for the fabrication of prototype non-volatile memory devices. A semiconducting-tungsten-disulfide-channel-based memory device is created by sandwiching high-density-of-states multi-layered graphene as a carrier-confining layer between tunnel barriers of hexagonal boron nitride （hBN） and silicon dioxide. The results reveal that a memory window of up to 20 V is opened, leading to a high current ratio （〉103） between programming and erasing states. The proposed design combination produced layered materials that allow devices to attain perfect retention at 13% charge loss after 10 years, offering new possibilities for the integration of transparent, flexible electronic systems.
