千万门级模块鱼骨型时钟网络的实现

Implementation of FISHBONE-based clock structure in ten-million gates block

在芯片规模越来越大的背景下,针对千万门级以上规模芯片模块,提出一种基于单鱼骨型时钟网络的改进型时钟结构,并给出在后端设计过程中基于EDA工具的具体实现方法。该时钟结构兼具鱼骨型时钟结构的特点,相较于自动化不定型时钟树,具备较低的时钟延迟、时钟漂移、片上误差和动态功耗。以规模2 600万门的28 nm芯片模块(工程代号YCU-AM)为例进行实现过程阐述,实验结果表明,该型时钟结构较不定型时钟树使模块整体功耗降低约5%。

The scale of modern SOC design is larger and larger, for ten million gates block, presents a clock structure improved from the Fishbone- based clock structure 。 Compared to CTS clock tree, clock latency, clock skew, On- Chip- Violation（ OCV） and dynamic power of clock is smaller 。 This paper is based on YCU- AM, a 26 million gates block, to describe the implementation method of the improved clock structure 。 Experimental results show that the improved clock structure can make the total block save about 5 % power.