摘要
介绍一组基于0.18μm逻辑平台构建的低导通态电阻（Low Ron）NLDMOS。该组LDMOS涵盖10~30 V应用电压。该NLDMOS为完全隔离型,因而其源端和漏端均可以独立于衬底加偏压。针对Drift区域和Body区域分别进行结构优化,最终得到性能良好的低导通态电阻（Low Ron）NLDMOS。其导通态电阻（Ron）为4.4 mΩ·mm-2对应击穿电压（BV）~20 V,21 mΩ·mm-2对应击穿电压（BV）~41 V。
ThepaperpresentsagroupofLowRo.NLDMOSbasedon0.18 μm logic platform that covers applied voltage ranging from 10-30 V. The fully isolated nature biases the source/drain electrodes with different voltages from the substrate potential. Structures of Drift side and Body side have been optimized to obtain well-performed Low Ron NLDMO S of which Ron reaches 4.4 mΩ. mm-2 at 20 V （B V） and 21 mΩ. mm^-2 at 41 V （B V）.
出处
《电子与封装》
2016年第7期39-43,共5页
Electronics & Packaging
