摘要
The thickness effect of the TiN capping layer on the time dependent dielectric breakdown(TDDB) characteristic of ultra-thin EOT high-k metal gate NMOSFET is investigated in this paper.Based on experimental results,it is found that the device with a thicker TiN layer has a more promising reliability characteristic than that with a thinner TiN layer.From the charge pumping measurement and secondary ion mass spectroscopy(SIMS) analysis,it is indicated that the sample with the thicker TiN layer introduces more Cl passivation at the IL/Si interface and exhibits a lower interface trap density.In addition,the influences of interface and bulk trap density ratio N_(it)/N_(ot) are studied by TDDB simulations through combining percolation theory and the kinetic Monte Carlo(kMC) method.The lifetime reduction and Weibull slope lowering are explained by interface trap effects for TiN capping layers with different thicknesses.
The thickness effect of the TiN capping layer on the time dependent dielectric breakdown（TDDB） characteristic of ultra-thin EOT high-k metal gate NMOSFET is investigated in this paper.Based on experimental results,it is found that the device with a thicker TiN layer has a more promising reliability characteristic than that with a thinner TiN layer.From the charge pumping measurement and secondary ion mass spectroscopy（SIMS） analysis,it is indicated that the sample with the thicker TiN layer introduces more Cl passivation at the IL/Si interface and exhibits a lower interface trap density.In addition,the influences of interface and bulk trap density ratio Nit/Not are studied by TDDB simulations through combining percolation theory and the kinetic Monte Carlo（kMC） method.The lifetime reduction and Weibull slope lowering are explained by interface trap effects for TiN capping layers with different thicknesses.
基金
supported by the National High Technology Research and Development Program of China(Grant No.SS2015AA010601)
the National Natural Science Foundation of China(Grant Nos.61176091 and 61306129)
the Opening Project of Key Laboratory of Microelectronics Devices&Integrated Technology,Institute of Micro Electronics of Chinese Academy of Sciences
