摘要
提出了一种适用于闪存的高速灵敏放大器。该灵敏放大器删除了位线嵌位电路,直接使用1.2 V电源供电的预充电路预充选定单元的位线到1.2 V电压级,与传统的通过位线嵌位电路嵌位的位线电压(0.5~0.8 V)相比,不仅节省了位线电压的稳定时间,而且增强了读取单元的电流窗口,进而减少感应延迟。在位线多路选择器中使用低压p沟道型晶体管,避免了列译码器中电压级移位器的使用,结果增强了位线有效预充时间。采用90 nm闪存工艺设计,提出的灵敏放大器在2.5 V电源电压时的读取时间是11.2 ns,相对于传统的结构,单个灵敏放大器的读取速度被优化了约20%。
A high-speed sense amplifier for flash memory was presented. It eliminates the bit-line clamping circuit and directly uses the precharge circuit supplied by 1. 2 V power supply to precharge the selecting bit-line for 1. 2 V voltage level,which saves stabilization time of bit-line voltage and enhances the current window of the reading unit thus decreasing the sensing delay,compared with traditional bit-line voltage level( 0. 5- 0. 8 V) clamped by the bit-line clamping circuit. The low-voltage PMOS transistor was adopted in bit-line multiplexer,which avoided the use of voltage level shifter in column decoder and thus enhanced efficient pre-charge time. With 90 nm flash memory technology,the read time of the presented sense amplifier is 11. 2 ns at power supply voltage of 2. 5 V. Meanwhile the reading access speed of single sense amplifier is improved by about 20% compared with the conventional structure.
出处
《半导体技术》
CAS
CSCD
北大核心
2016年第8期570-574,共5页
Semiconductor Technology
基金
国家自然科学基金资助项目(61376028)
上海市科委智能制造及先进材料领域资助项目(13111104600)
关键词
闪存
灵敏放大器
电流模式
高速
低压PMOS晶体管
flash memory
sense amplifier
current mode
high-speed
low-voltage PMOS transistor