摘要
基于SMIC 40nm CMOS工艺,提出了一种改进型电荷泵电路。在传统电荷泵锁相环中,电荷泵存在较大的电流失配,导致锁相环产生参考杂散,使锁相环输出噪声性能恶化。设计的电荷泵电路在电流源处引入反馈,降低了电流失配。仿真结果表明,在供电电压为1.1V,电荷泵充放电电流为0.1mA,输出电压在0.3-0.7V范围变化时,电荷泵的电流失配率小于0.83%,锁相环的输出参考杂散为-65.5dBc。
An improved charge pump circuit was designed in SMIC 40 nm CMOS process.In conventional charge pump phase-locked loops(CPPLL),reference spur was generated due to the current mismatch of charge pump,and the output noise performance of PLL was decreased.In this design,a feedback circuit was added in current source to reduce the current mismatch.The results showed that the current mismatch of charge pump was less than 0.83%,the reference spurs was-65.5dBc in the output voltage range of 0.3-0.7Vwhen the supply voltage was 1.1Vand the charge pump current was 0.1mA.
出处
《微电子学》
CAS
CSCD
北大核心
2016年第4期480-483,共4页
Microelectronics
基金
中国科学技术大学信息科学实验中心EDA平台对本设计的支持
联发科公司对中国科大学生和项目的支持
关键词
电荷泵
锁相环
电流失配
CMOS集成电路
Charge pump
Phase-locked loop
Current mismatch
CMOS integrated circuit