一种高线性度低噪声下变频混频器

A High Linearity Low Noise Down Conversion Mixer

采用SMIC 0.18μm RF CMOS工艺,设计了一种高线性度、低噪声下变频混频器。通过分析跨导级电流3阶展开项系数,优化跨导级偏置电压,在跨导级与开关级之间增加谐振频率为射频信号频率的LC并联谐振电路,在提高电路线性度的同时优化了信噪比。后仿真结果表明,在射频频率为1.575GHz,本振频率为1.571GHz,中频频率为4 MHz时,本振功率为0dBm,电压转换增益为19.22dB,输入3阶交调点为21.93dBm,单边带噪声系数为11.74dB。混频器工作电压为1.8V,功耗为3.66mW,核心电路版图面积为0.207 5mm^2。

A high linearity low noise down conversion mixer was designed in the SMIC 0.18μm RF CMOS process.Through the analysis of the third-order expansion coefficient,an optimum gate bias was applied to the transconductance stage and a parallel LCnetwork resonating at fRF was added between the transconductance stage and the switch quad to improve the linearity and signal to noise ratio.Results from layout simulation showed that the mixer achieved a voltage conversion gain of 19.22 dB,an input-referred third-order intercept point of 21.93 dBm and a single side band noise figure of 11.74 dB when the radio frequency was 1.575 GHz,the local oscillator was1.571 GHz and the intermediate frequency was 4 MHz.This mixer operated at a 1.8 V power supply,and the power consumption was 3.66 mW.The core circuit occupied a chip area of 0.207 5mm^2.